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Input Guidelines for HyperLynx BoardSim
1. PCB Layout
BoardSim reads .HYP (HyperLynx format) ASCII files created
for PCB layouts. The .HYP file contains
information about the board’s layout that is relevant to signal integrity
Note: Names assigned
to boards, schematics, and multiple board project files should be unique and
not shared. BoardSim automatically
creates a .PJH file (a project file named after a board, schematic or multiple
boards) and can overwrite previously saved settings with that of a file using a
2. Board Routing
If un-routed nets exist in the .HYP file, BoardSim provides
for routing during the input loading process by using Manhattan Routing. Manhattan Routing may also be used after the
.HYP file has been loaded. Early in the
PCB layout process, after components have been placed, nets that have not yet
been routed (i.e. un-routed nets) may be routed and analyzed. Previously routed nets that do not meet
signal timing, signal integrity, crosstalk, or EMI goals may be re-routed for
analysis. BoardSim's Manhattan routing
capability allows for a "what if" analysis to predict the effects of
routing, re-routing, or component repositioning.
BoardSim's Manhattan Routing mimics real routing by generating
the physical parameter values (e.g. net length, trace width, etc.) required for
simulation. BoardSim can create Manhattan Routing for un-routed, partially
routed, or fully routed nets. BoardSim
re-routes partially routed and fully routed nets by first completely un-routing
them, then re-routing them with Manhattan Routing.
Routing connects pins by a simple daisy chain method. However, the routing path between pins is undefined. This is sufficient for signal integrity
analysis, but crosstalk analysis requires trace-to-trace proximity information
that can be derived only from full routing information. For multiple board projects being loaded
into BoardSim, Manhattan Routing is created only for the selected board ID
(i.e. Manhattan Routing stops at the board's external connector).
3. Board Stackup
When BoardSim loads a board, it examines the stackup in the
.HYP file to determine if it is electrically valid. If not, BoardSim runs the Stackup Wizard to make
corrections. If the Stackup Wizard
runs, it opens and shows a list of the changes that it made to the
stackup. Additional corrections may be
made manually with the stackup editor.
Note: Even if the
Stackup Wizard does not run, the correct stackup information should be available
for verification. A correct stackup is
important because it affects the impedances of the traces on the boards. The impedances in turn affect BoardSim’s
simulation results. Layers may be
added, moved, deleted, and edited.
There must be at least one plane layer in the stackup, and all layers
must have non-zero thickness.
When BoardSim loads a board, it examines the list of devices
in the .HYP file and tries to determine the component type (i.e. IC, R, C, L,
and ferrite bead) of each device by looking at the device’s reference
designator prefix. A "Prefix"
is defined as the first part of the reference designator (usually the alphabet
character of an alphanumeric name or the identifier that is in common with all
components of the same type). For
example, if all of the ICs on a board have a reference designator of the form
"Uxx" (U1, U2, U3A, U3B, etc.), then "U" would be the
reference designator prefix for ICs.
Capacitors would commonly have a prefix of “C” and resistors
"R". Verification and mapping
changes may be needed if problems are indicated.
Note: BoardSim has a
set of default mappings for reference designator prefixes that it uses to
identify the component types for devices in the .HYP file. If your rules for reference designators
match BoardSim’s defaults, then there is no need to change any of the mappings.
5. Power Supply
When BoardSim loads a board, it attempts to identify power
supply nets by their names (BoardSim has certain built-in name matching rules)
and by looking at the number of capacitors connected to each net. In some cases, BoardSim cannot find all the
power supply nets, so some of them may require manual identification using the
power supply editor along with the correct circuit design information.
power supply nets is important because BoardSim treats a power supply as a DC
voltage. If, for example, the power supply side of a pull-up resistor is
mistaken for a non power supply net, BoardSim will simulate the resistor as a
series terminator instead of a parallel terminator. Also, the Vcc and Vss pins on an IC can only be attached in
BoardSim to nets identified as power supplies.
Net identification utilizes the net’s assigned name.
Note: Unnamed nets
will be identified with a reference designator assigned by BoardSim.
7. Driver and
BoardSim supports four model formats, .MOD and .PML
(HyperLynx formats), .IBS and .EBD (both are IBIS formats, which are industry
standard formats). .MOD and .PML models are in libraries with file extensions
.MOD and .PML. .IBS and .EBD models are in libraries with extensions .IBS and
.EBD. There is a large collection of standard logic models in library
GENERIC.MOD; there are generic technology models (e.g., 3.3-V fast CMOS) in
simulation, BoardSim requires a driver IC for each net to be analyzed. Receiver
ICs may also be added for greater accuracy.
Any unspecified IC models are treated as electrically
"open." Signal integrity
simulations require only the models for device families and not necessarily
specific devices, since only output buffer and input stage characteristics need
to be modeled.
8. Passive Components
When BoardSim loads a board, it attempts to identify resistor
and capacitor values from data provided by the PCB layout tool.
Note: In some cases,
BoardSim is not given the correct values, so these may require manual
verification and changes using the known values.
When BoardSim loads a board, it attempts to identify the
non-discrete resistors and capacitors that are contained in packages along with
other Rs or Cs. In some cases, BoardSim
cannot properly identify the package style or internal connectivity of the
packaged Rs or Cs.
Note: Some of these
cases may require manual identification and configuration using the package
editor along with the correct device information.
BoardSim allows placement of the oscilloscope probes at any
of the device pins on a net. The
simulation presents a choice of either a single edge (rising or falling) or a
repetitive oscillator waveform.
Note: The single
edge is recommended for isolating transmission line effects without the
confusing effects due to any additional transitions. The oscillator waveform is better for studying the standing wave
effects of a repetitive source. The
oscilloscope also allows control of whether the IC models in a simulation run
with best case (fast driver, strong receiver), typical, or worst case (slow
driver, weak receiver) operating parameters.
Specific operating characteristics should be provided for critical